3.0    Hardware


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The following image shows where some of the hardware components are located.

 

Eagle 100 Parts Location

 

3.1    Microcontroller

The Eagle 100 includes a Luminary Micro Stellaris LM3S6918 microcontroller. This 32-bit ARM Cortex-M3 RISC microcontroller is capable of 50-MHz operation with a Thumb2 instruction set for smaller object code. It has hardware division and single cycle multiplication for fast calculations. The nested vector interrupt controller provides interrupt handling for 33 interrupts with eight levels of priority. Please see the Luminary Micros’ LM3S6918 Microcontroller Data Sheet for more information and register definitions.

LM3S6918 key features:

•    Internal Memory
    ▫ 256 kilo-bytes flash
    ▫ 2-kB flash block protection defined by the user
    ▫ Flash data programming
    ▫ User defined and managed flash-protection block
    ▫ 64 kilo-bytes SRAM
•    Timers
    ▫ Four General Purpose Timer Modules (GPTM)
        Each GPTM can operate independently
        Each module provides two 16-bit timers or one 32-bit timer
        Can be used for Pulse Width Modulation (PWM)
        Can be used to trigger analog to digital conversions
    ▫ System Timer (SysTick)
        24-bit clear on write decrementing counter
        Uses include RTOS tick timer, high speed alarm timer, or a simple counter
    ▫ ARM FIRM compliant Watchdog Timer
        32-bit decrementing counter
        Programmable load register
        Separate clock with an enable
•    10/100 Ethernet Controller
    ▫ IEEE 802.3-2002 specification
    ▫ Half and full duplex for 10 Mbps and 100 Mbps
    ▫ Automatic MDI/MDI-X cross over correction
    ▫ Programmable MAC address
    ▫ Power down and power saving modes
•    UART
    ▫ Two fully programmable 16C550 type UARTs
    ▫ Separate transmit and receive FIFOs
    ▫ Baud rates up to 3.125 Mbps
    ▫ Loopback mode for testing and debugging
•    Synchronous Serial Interface (SSI)
    ▫ Master or slave operation
    ▫ Separate transmit and receive FIFOs
    ▫ Freescale SPI, MICROWIRE, or Texas Instruments synchronous serial interfaces
    ▫ Internal loopback mode for testing and debugging
•    I2C Module
    ▫ Master or slave operation
    ▫ 100 kbps or 400 kbps transmission speed
    ▫ Mulitmaster support
    ▫ 7-bit addressing mode
•    Analog-to-Digital Converter
    ▫ Eight 10-bit channels
    ▫ Single and differential input configurations
    ▫ 500k samples per second
    ▫ Four programmable sampling sequences with conversion result FIFOs
    ▫ Sequences triggered by software, timers, analog comparators, or GPIO
    ▫ On-chip temperature sensor
•    General Purpose Input or Outputs (GPIO)
    ▫ 5V tolerant inputs
    ▫ Every GPIO is capable of edge triggered or level sensitive interrupts
    ▫ Enable or disable internal weak pull-up or pull-down resistors
    ▫ Programmable open drain input or outputs
    ▫ Programmable drive current of 2mA, 4mA, or 8mA
•    Reset Sources
    ▫ Power on reset
    ▫ Reset pin assertion
    ▫ Brown out reset
    ▫ Software reset
    ▫ Watchdog timer reset
•    Additional Features
    ▫ IEEE 1149.1-1990 compliant Test Access Port (TAP) controller
    ▫ Debugging via JTAG or Serial Wire interfaces
    ▫ Programmable PLL for system clock

3.2    CPLD

A Xilinx’s XC9572XL Complex Programmable Logic Device(CPLD) comes standard on the Eagle 100. The CPLD supports in-system programming via an IEEE 1149.1 boundary-scan JTAG. The XC9572XL is a 3.3V CPLD with 5V tolerant pins. The CPLD has 1,600 usable gates and 72 macrocells. For further information please see Xilinx’s XC9500XL High-Performance CPLD Family Data Sheet.

3.3    DAC

The Eagle 100 includes a National Semiconductor’s DAC104S085 general purpose digital-to-analog converter (DAC). The DAC has four channels with a resolution of 10-bit. The output amplifiers allow for a rail-to-rail output swing from 0 to 3.3V. Communication to the DAC is done through a three wire synchronous serial interface that operates up to 40 MHz. The DAC’s outputs have a settling time of 6µs. It allows for simultaneous output updating. For further information please see National Semiconductor’s DAC104S085 Data Sheet.

Revised: August, 2008

1.0    Introduction


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1.1    Eagle Family of Controllers

The Eagle series of single board computers run on an ARM Cortex-M3 microcontroller with a vast array of peripherals from 10/100 Ethernet to a reprogrammable CPLD. Through example programs and project files this family of single board computers can be developed from concept to production quickly. The Eagle family is available in custom and standard configurations.

1.2    Eagle 100 Overview

The Eagle 100 is a single board computer designed for cost-sensitive control applications that require real-time performance, networking and extensive support of popular peripherals. It delivers 32-bit performance and features at a cost equivalent to legacy 8- and 16-bit controllers. Powered by a Luminary Micro Stellaris LM3S6918 ARM Cortex-M3 microcontroller, capable of over 60 MIPS, the Eagle 100 can fulfill demanding requirements in monitoring, instrumentation, data acquisition, process control, factory automation and many other applications. An extensive array of peripherals is built-in plus expandability is available using PC/104 I/O cards. Several peripherals can be reconfigured with the programmable logic capabilities of the integrated CPLD.

1.3    Eagle 100 Features

•    50 MHz 32-bit ARM® Cortex™-M3
•    256 KB Flash/64 KB SRAM
•    10/100 Ethernet
•    Micro-SD Socket
•    LCD Port
•    4x4 Keypad Port
•    PC/104 8-bit I/O expansion
•    Two RS232 Serial Ports
•    I2C, SSI (SPI) Ports
•    8-ch. 10-bit ADC, 4-ch. 10-bit DAC
•    Reconfigurable I/O with Xilinx CPLD
•    Up to 52 - 5V tolerant GPIOs, 80 without PC/104
•    4 general purpose timers, 1 watchdog timer
•    Support for GNU and IAR compilers
•    Thumb2 instruction set for smaller object code
•    Basic and Python also supported
•    +5V@250mA power supply required
•    Dimensions: 3.8 inches x 4.4 inches

 
Eagle 100 Block Diagram

 

Figure 1.3: Eagle 100 Hardware Block Diagram

1.4    Eagle 100 Development Kit

The EAGLE 100-20 development kit comes with all of the necessary hardware and software to quickly develop applications. The development kit includes the following:

•    1 – EAGLE 100 SBC
•    1 – IAR J-Link Debugger
•    1 – IAR Embedded Workbench for ARM, 32K Kickstart Version

The Eagle SBC is also available unbundled, without the power supply and debugger.

1.5    Software and Support

Code examples are included with the Eagle 100 to get you started quickly. Applications can run standalone with no operating system or can use a compact real time operating system such as FreeRTOS. You can use popular IDEs together with the GNU and IAR compilers. The microSD card capability simplifies program and data storage. Remote access can be implemented via web or command line interfaces, providing off-site monitoring and maintenance capabilities. The JTAG interface speeds up application development and debugging.

Ports of popular Basic and LUA development tools are available for the Eagle 100 to reduce application development time and simplify integration with code libraries developed for industrial and scientific environments. Using these tools, you can achieve significant functionality in a very short time. These open source tools can be easily extended, allowing a virtually unlimited number of possibilities.

Micromint USA provides free technical support by phone, email, or fax. Technical support emails are usually answered within one business day. Software and documentation updates are available on our website at www.micromint.com. Each product comes with a one year warranty.

Revised: August, 2008 

4.0    User Interfaces, Connectors, and Jumpers


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The following image shows where the connectors, headers, and jumpers are located on the Eagle 100.
 

4.1    Power Supply

The Eagle 100 requires a regulated +5VDC at 250mA power supply applied to J1. J1 comes standard with a 2.5 mm positive center tapped female power supply jack. It can be populated with a 2 position screw terminal upon request. A diode (D1) will protect the Eagle 100 should polarity of the power supply be reversed. When power is applied LED1 will illuminate.                                    
       


                 WarningWARNING:

Supply voltages over +5VDC while a LCD is connected may damage the LCD.

Power supply connector
Figure 4.1: Power supply connector configurations

4.2    10/100 Ethernet

The LM3S6918 is equipped with a fully-integrated 10/100 Mbps Ethernet Controller. Both the Ethernet Media Access Control (MAC) and Physical (PHY) layers are integrated in the microcontroller. The RJ-45 connector with integrated magnetics and built in LEDs completes the Ethernet sub-system.  Please see the LM3S6918 data sheet for further information on the Ethernet controller.

4.3    Serial (COM) Ports

Both Universal Asynchronous Receivers/Transmitters (UARTs) are level shifted to RS-232 levels. UART0 (COM1) reaches the external world through a male DB9 connector. UART1 (COM2) reaches the external world through a 2x5 pin berg header.  Please see figure 4.3 for the pin outs of COM1 (J3) and COM2 (J4) connectors. The two serial ports support software handshaking (XON/XOFF). To simplify interfacing to devices using hardware handshaking, a loopback is implemented on the modem control signals, from RTS to CTS and from DTR to CD and DSR. Note that the loopbacks do not provide flow control so software handshaking should be used when proper flow control is desired.

  
COM port connector
Figure 4.3: COM port connector pin outs

4.4    Micro-SD

The microSD socket (J9) enables micro-secure-digital memory cards to be plugged into the Eagle 100 microcontroller board. The microSD card allows the user the ability of a standard removable media for transferring data to and from the Eagle 100.

4.5    General Purpose Digital Inputs and Outputs

The general purpose digital inputs/outputs (I/O) are broken into two different categories GPIO (General Purpose Input/Outputs) and Extended I/O. The GPIO is accessed directly through the LM3S6918 microcontroller and the Extended I/O is accessed through the CPLD (Complex Programmable Logic Device) via the microcontrollers Synchronous Serial Interface (SSI) port zero.

There are twenty bits of GPIO available on the J2 connector. Please see the pin out for J2 in Figure 4.5. Eight bits are from port B, eight are from port C and four are from port E. NOTE: If the keypad port (J11) is used then port B on the J2 connector should not be used (pins 3 through 10 of J2). Ports B, C, and E have alternate functions other than digital inputs and outputs. Table 4.5 lists the alternate functions and a brief description of the function. For further information on the alternate functions please refer to the LM3S6918 data sheet.  

The J2 connector also has the input and output for the hibernation module. Pin 29 is the WAKE input that brings the microcontroller out of hibernation mode when it is asserted. Pin 30 is the HIB output that indicates the microcontroller is in hibernation mode. The power source (VBAT) for the hibernation module can be accessed from Pin 28 of J2.

The extended I/O is accessed through the CPLD. There are four eight bit ports PXA, PXB, PXC, and PXD. The pin out for the extended I/O connector (J12) can be viewed in Figure 4.5. The numbers in parenthesis are the pin numbers for the CPLD. The provided VHDL firmware can be changed to use the extended I/O ports for application specific purposes.  NOTE: If the LCD connector (J10) is used then PXD of the extended I/O is no longer available and nothing should be connected to pins 33 through 40 of J12.

J2 Pin#

GPIO

Alternate Function

Brief Description

3

PB0

CCP0

Capture/Compare/Pulse Width Modulation Channel 0

4

PB1

CCP2

Capture/Compare/Pulse Width Modulation Channel 2

5

PB2

I2C 0SCL

Inter-Integrated Circuit Interface bus 0 clock

6

PB3

I2C 0SDA

Inter-Integrated Circuit Interface bus 0 clock

7

PB4

C0-

Analog comparator channel 0 negative input

8

PB5

C1-

Analog comparator channel 1 negative input

9

PB6

C0+

Analog comparator channel 0 positive input

10

PB7

TRST

JTAG Test Reset

13

PC0

TCK/SWCLK

JTAG Test Clock/Serial Wire Debug clock

14

PC1

TMS/SWDIO

JTAG Test Mode Select/Serial Wire Debug Input and Output

15

PC2

TDI

JTAG Test Data Input

16

PC3

TDO/SWO

JTAG Test Data Output and SWO

17

PC4

CCP5

Capture/Compare/Pulse Width Modulation Channel 5

18

PC5

C1+/C0o

Analog comparator channel 1 positive input/Analog comparator channel 0 output

19

PC6

CCP3

Capture/Compare/Pulse Width Modulation Channel 3

20

PC7

CCP4

Capture/Compare/Pulse Width Modulation 4

23

PE0

SSI1Clk

Synchronous Serial Interface bus 1 clock

24

PE1

SSI1Fss

Synchronous Serial Interface bus 1 function slave select

25

PE2

SSI1Rx

Synchronous Serial Interface bus 1 receiver

26

PE3

SSI1Tx

Synchronous Serial Interface bus 1 transmitter


Table 4.5: GPIO alternate functions
 
Extended I/O and GPIO Connector
Figure 4.5: Extended I/O and GPIO connector pin out (CPLD pin#)

4.6    Keypad

A 4x4 matrix keypad using a 16-pin (2x8) ribbon cable can be connected to port B of the microcontroller through J11.  Please see Figure 4.6 for the pin out of the keypad connector. NOTE: If the keypad port (J11) is used then port B on the J2 connector should not be used (pins 3 through 10 of J2).

 
Keypad connector
Figure 4.6: Keypad connector pin out


4.7    Liquid Crystal Display (LCD)

A standard alphanumeric LCD may be connected to J10 through a 32-pin (2x16) ribbon cable. Extended port D is the byte-wide port used for the LCD’s data bus. The LCD’s control signals and backlight are driven by the CPLD as well. The contrast for the LCD may be adjusted by turning potentiometer R33 located next to J10. Please see figure 4.7 for the LCD’s connector pin out. NOTE: If the LCD connector (J10) is used then PXD of the extended I/O is no longer available and nothing should be connected to pins 33 through 40 of J12.
 
LCD connector
Figure 4.7: LCD connector pin out (CPLD pin#)

4.8    JTAG

The JTAG port can be used for software download and debugging, reducing the need for an in-circuit emulator. For detailed information on the operation of the JTAG port and TAP controller, please refer to IEEE Standard 1149.1-Test Access Port and Boundary-Scan Architecture.
JTAG connector

Figure 4.8: JTAG connector pin out

4.9    Analog to Digital Converter (ADC)

The Eagle 100’s eight channels of 10-bit ADC can be connected to through J7. Please see figure 4.9 for the pin out of the ADC connector. The ADC is accessed directly through the LM3S6918 microcontroller. It is capable of 500 kilo-samples/second and can be configured as eight single ended or four differential channels. The ADC can be triggered to read through software, timers, analog comparators, or GPIO. An internal temperature sensor may be read using the ADC module. Please see the LM3S6918 datasheet for further details.
ADC connector

Figure 4.9: Analog to Digital connector pin out

4.10    Digital to Analog Converter (DAC)

The Eagle 100’s four channels of 10-bit DAC can be connected to through J8. Please refer to figure 4.10 for the pin out of the DAC connector. The DAC is accessed through the LM3S6918’s SSI0 port. Port G bit 0 is the DAC’s sync input for loading the conversion count into the DAC.
DAC connector

Figure 4.10: Digital to Analog connector pin out

4.11    Pushbuttons and LED

The Eagle 100 comes standard with a user pushbutton, a reset push button, a user LED and a power LED. The user push button is connected to port A bit 6 with a 10kΩ pull-up resistor connected to it. The user LED is buffered through the CPLD and can be illuminated by setting port E bit 1 of the LM3S6918.  

4.12    CPLD Programming Header

The CPLD comes preprogrammed from the factory with VHDL code that will function with the example programs and certified PC/104 expansion boards. The VHDL firmware can be updated in two ways. The first way is directly through the CPLD’s JTAG port which can be accessed through the combination of JP1 and JP2 as illustrated in Figure 4.12. The second method is by programming the LM3S6918 microcontroller with a utility that will program the CPLD through its SPI0 port. This can be done by placing jumper across pins 1&2, 3&4, 5&6, and 7&8 of JP1 as like in Figure 4.12.  
 
CPLD programming jumper
Figure 4.12: CPLD programming jumper pin out (CPLD pin#)

4.13    PC/104 Expansion

The available signals on the PC/104 expansion connector are shown in Figure 4-13. The default VHDL firmware shipped with the Eagle SBC allows access to those signals as extended I/O ports. VHDL firmware is available on the Micromint web site that allows use of certified PC/104 expansion boards with the Eagle SBC. Using the signals for extended I/O will lead to higher I/O performance but the PC/104 mode allows use of off-the-shelf expansion boards.
PC/104 connector

Figure 4.13: PC/104 connector pin out (CPLD pin#)
Revised: August, 2008

Below is a list of manuals in HTML and PDF formats.

Eagle 100 User's Manual (HTML)  PDF

 

2.0    Getting Started


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2.1    Installation

The Eagle 100 SBC is shipped with the Serial-to-Ethernet (S2E) example application from the Luminary DriverLib. This application implements the lwIP TCP/IP stack, a web server and a telnet server directly managing the COM1 serial port. It can be used to test the board functionality and also provide Ethernet connectivity to legacy controllers that have a serial interface but no network interface. After connecting the power supply and Ethernet adapter, the board will obtain an address from a DHCP server on the network. Opening the assigned address on a web browser will produce a screen similar to that in Figure 2.1. The assigned address can also be accessed via telnet. Full source code for the Serial-to-Ethernet application is included so you can modify it to suit your application requirements.

 

Serial-to-Ethernet Web Interface

 

Figure 2.1: Web interface for Serial-to-Ethernet application

2.2    Programming Language Support

After testing the board with the example application, you should become familiar with development tools used to take advantage of the board’s functionality. The Eagle 100 Board Support Package (BSP) includes examples to use the board functionality with several development tools. Currently the following compilers and programming languages are supported:

•    IAR Embedded Workbench for ARM (ewarm) 5.20
•    GNU Toolchain (gcc) for ARM 4.2.3 – CodeSourcery G++ 2008q1
•    GNU Toolchain (gcc) for ARM 4.3.0 – devkitARM 23b or WinARM 20080331
•    Jumentum BASIC 0.94
•    Lua 5.1.3

The tools included in the CDs shipped with the board include a kickstart version of the IAR Embedded Workbench for ARM, one of the GNU Toolchains for ARM, a BASIC interpreter and a LUA interpreter. Project files are included to build C, Assembler and DriverLib applications with both the IAR and CodeBlocks IDEs.


The Eagle 100 Setup CD includes tools and example applications to get you started with the Eagle 100 SBC functionality. The main menu is shown in Figure 2.2. Please select the tools button corresponding to the programming language you will be using and install the required components.
 

Eagle Setup CD Main Menu

 

Figure 2.2: Eagle Setup CD Main Menu


The IAR Kickstart CD installs a 32 KB code-sized limited version of the IAR C/C++ compiler and debugger. The IAR compiler generally produces the smallest code sizes for ARM targets and has excellent debugging capabilities. To install it select the "Install IAR Embedded Workbench" option from the CD main menu shown in Figure 2.3. Follow the instructions in the installation application. We suggest that you use the default directories, and the "Full" installation option.
 

IAR Kickstart CD Main Menu

 

Figure 2.3: IAR Kickstart CD Main Menu

2.3    Compiling Applications with IAR EWARM

To load the DriverLib workspace in the IAR IDE, select Programs> Micromint Eagle> IAR> DriverLib Examples from your Windows Start menu. The IAR Embedded Workbench for ARM will start and you will see a screen similar to that on Figure 2.4. Select the Blinky project by right clicking the project name and selecting "Set as Active". To rebuild the project select the "Make"   button on the toolbar. You can also right click on the project name to select "Make" or "Rebuild". This will build a binary (.BIN) image file on the "ewarm\Exe\" directory of the project. To run the file you can select use of the firmware download procedures outlined later in this chapter. If the build and download is successful, the user LED on the Eagle SBC will start blinking.
 

IAR EWARM IDE

 

Figure 2.4: Using the DriverLib projects with the IAR EWARM IDE

2.4    Compiling Applications with the GNU Toolchain

To load the DriverLib workspace in the CodeBlocks IDE, select Programs> Micromint Eagle> CodeBlocks> DriverLib Examples from your Windows Start menu. The CodeBlocks IDE will start and you will see a screen similar to that on Figure 2.5. Select the Blinky project by right clicking the project name and selecting "Activate project". To rebuild the project select the "Rebuild"  button on the toolbar. You can also right click on the project name to select "Build" or "Rebuild". This will build a binary (.BIN) image file on the "gcc\" directory of the project. To run the file you can select use of the firmware download procedures outlined later in this chapter. If the build and download is successful, the user LED on the Eagle SBC will start blinking.
 

CodeBlocks IDE

 

Figure 2.5: Using the DriverLib projects with the CodeBlocks IDE

2.5    Compiling Applications from the Command Line

All example programs include a Makefile that allows you to build binary images from the command line using the GNU toolchain. The GNU "make" utility is installed as part of the GNU toolchain on the Eagle Setup CD. To build an image using the command line, just change to the project directory and execute "make".

2.6    Firmware Updates using the JTAG

The simplest way to download files to the Eagle SBC is by using a JTAG debugger probe that is supported by IDE in use. When you start a debugging session, the binary image file will be loaded automatically to the board. Using a JTAG debugger also allows you to place breakpoints and watch variables to find problem areas in your application.
To use the J-Link debugger with IAR EWARM, select Projects> Options> Debugger with the project name selected in the workspace. On the "Setup" tab select "J-Link/J-Trace" as the driver and "main" as the location to run to start the debugger after a reset. Then select the "Download and debug" button on the toolbar and then the "Go" button to execute.

2.7    Firmware Updates using the Ethernet Bootloader

The Eagle SBC is shipped with an Ethernet bootloader that can be used to update the firmware on the board from an Ethernet connection. To place the bootloader in update mode you need to press and hold the user LED button while the board is starting up, e.g. via power up or when pressing the reset button. After the board starts up, release the user LED button and you will see the user LED blinking approximately once per second. That indicates the board is ready to receive a firmware update via Ethernet.

The Ethernet bootloader uses the BOOTP and TFTP protocols to temporarily acquire an IP address and copy the binary image to the board. The Luminary Flash Programmer implements a small BOOTP and TFTP server to do this. To load the flash programmer, select Programs> Micromint Eagle> LM Flash Programmer> LM Flash Programmer from your Windows Start menu. Go to the “Setup” tab to see a screen similar to that in Figure 2.6. On “Interface” select "Ethernet Interface". On the Client IP address field enter an IP address that is on the same subnet as your Ethernet adapter but is not used on your network. If you have doubts, you can connect a cable directly from the Eagle SBC to your PC to bypass the network and avoid any potential address conflicts. On the Client MAC address field enter the MAC address of your Eagle SBC, which is the same as the serial number on the board. Finally on the Ethernet adapter, select the interface on the PC to be used for the transfer.
After the setup is complete, you are ready to download the binary image to the board. Switch to the “Program” tab, select the file to download and click the “Program” button.


The bootloader uses the first 8 KB of the flash address space (0x00000000 to 0x00001fff). Programs loaded with the bootloader should be linked to start at address 0x00002000. That is done automatically if you use the "ewarm/application.icf" or "gcc/application.ld" linker scripts used in the examples.


You can overwrite the bootloader if you so desire by using the "ewarm/standalone.icf" or "gcc/ standalone.ld" linker scripts and downloading your binary image via the JTAG. Currently the bootloader can not be overwritten via the Ethernet port.
 

Flash Programmer Configuration

 

Figure 2.6: Flash programmer configuration

 

Flash Programmer Download

 

Figure 2.7: Flash programmer download


2.8    Firmware Updates from the Command Line

The Luminary Flash Programmer can also be invoked from the command line. The following command line is equivalent to the procedure in the previous section but uses a command line interface instead of a GUI interface.

lmflash -i ethernet -n 192.168.1.201,192.168.1.210,00-21-A3-00-01-02 blinky.bin

To see all options available from the command line, use “lmflash –h”.

Revised: August, 2008