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AN502 |
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Domino 1 & Domino 2 |
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Assembly Language Interrupt Handler for Timer1 |
03/26/01 |
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Introduction: This application note will illustrate how to create an interrupt handler for Timer1 on the Domino 1 and 2 microcontrollers. |
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Background: BASIC-52 gives the user the ability to handle interrupts with the ONTIME and ONEX1 instructions, but these instructions are much slower than an assembly language handler. All interrupts are disabled upon power-up. Setting bit 7 and bit 3 in the Interrupt Enable (IE) register enables the Timer1 overflow interrupt. When the Domino is powered up Timer1 is enabled and starts counting. |
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How it works: In the 80C52, the interrupts are vectored to specified address locations. The Timer1 overflow interrupt’s vector address is 01BH. When an interrupt occurs, a hardware LCALL instruction pushes the contents of the program counter onto the stack, and then loads the appropriate vector address. At the vector address, BASIC-52 checks to see if it should respond to the interrupt. If BASIC-52 isn’t going to handle the interrupt, it pushes the program status word onto the stack and LJMPs to the handler vector. The user needs to place a LJMP in the handler vector that points to the address of the handler routine. When the jump is made to the Interrupt Service Routine (ISR) a few important register values need to be saved so that when the return is made to BASIC the program can pick up exactly where it was interrupted. If the serial port is being used the first thing that needs to be done is to check and see if there is a transmission in progress. If there is, then the ISR should wait for the transmission to finish. Then the SCON, ACC, DPH and DPL registers should be pushed onto the stack (the ACC, DPH and DPL only need to be saved if the user wants to preserve them, saving isn’t always necessary). BASIC pushed the program counter and the Program Status Word (PSW) onto the stack when the interrupt was generated. Bit 6 in the TCON register (bit 6 is responsible for starting and stopping the counter, a 1 starts and a 0 stops the counter) needs to be cleared while servicing the interrupt to prevent another interrupt. When the ISR is finished the user must pop off all the registers placed on the stack. The last register that was pushed must be the first register popped off. Even though BASIC pushed the PSW onto the stack the user is responsible for popping it off. The Program Counter is popped off when the RETI is executed. The sample program listed illustrates how to write an ISR. This particular program counts from 0 to 50 and then displays the number. The program is interrupted approximately every 60mS. When the interrupt is generated the words ‘Program Interrupt’ is transmitted out the serial port. The start address (ORG address) of the ISR is 0D000H. The ISR was assembled using the ASEM_51 assembler and was stored using Micromints STOREHEX.BAS routine. The LJMP pointing to the ISR was stored into 041BH using the XBY instruction. |
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Program Listing: Interrupt Service Routine
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BASIC Program:
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